Raspberry Pi Forums

awagner wrote:I assume you connected your digital multimeter between 5V and a Pi output. That is not a test for a protection diode. 10M is far to high, that could be any kind of leakage. Repeat with 10k or 3K3 and you get a real test.

The leakage only starts above 3.3V, but you are right, its characteristic is not like a diode. The current increases only one order of magnitude between 3.45V and 5V. By contrast, the low side starts to conduct around -0.3V and does look like a diode.

I do not think I will test for your Zener-like clamp, or connect any 5V signals in through a 1K resistor, when a simple divider is known to be safe. However, I suspect you may be right that the design intentionally allows some degree of overvoltage tolerance, at the user's risk.

Also, I remembered comments like: http://www.raspberrypi.org/archives/384#comment-5246

Thanks for the confirmation.

Care is always advisable, hence I have the 1k resistor in my advice on how to interface 5V. If you only use it as input, using a larger resistor or a divider is fine. If you want to use it as input and output, then 1k is exactly the way to go. This still results in almost no current at a maximum of 5.5V when used as input, which is the typical maximum for a 5V tolerant input anyways. I am pretty convinced the only "risk" here is created by the missing data-sheet, which I can only call a complete decision making failure.

The low sides are definitely diodes. I have managed to heat some up by about 1-2C by putting 25mA through individual I/Os. That is less effect than briefly touching the chip with my finger to heat it up a bit (22C room temperature), hence I think as long as the total I/O port current is not exceeded (I believe 40mA were stated somewhere), putting 20mA into the low-side protection diodes should be completely unproblematic. I would not put that into the high-side protection circuit, but doing so would likely need something like 8-9V anyways. I just got adventurous and tried to get it to take 0.5mA. That clamps hard at 7.5V and it does cause some thermal change, not much, but noticeable.

As to the link, I would be surprised in Liz was right. I/O does not have "lifetime issues" unless heated up. The only two things to kill CMOS is heat (slowly) and gate-insulation breakdown (instantly). A protection circuit that clamps at 7.5V rather strongly indicates gate insulation that can take 8V or more, as the clamping always needs to happen below the break-down voltages or it becomes useless. And it also strongly indicates a 5V-tolerant input. Those do not have "lifetime issues" at 5V. Also note that the diode suggested by Liz will not drop the voltage that much, as only very little current is flowing. With the 2.4uA I measured as input current at 5.5V, a standard 1N4148 will reduce voltage only by around 300mV, which will do nothing to mitigate any "lifetime issues".

I am very sorry, but while the Pi is a great project, its designer-team seems to be really weak on analog electronics. And they amplified that problem by not being able to give out the manufacturer info so others could make informed decisions based on that.

Anyways, let me sum up:

1. There are no upper protection diodes.
2. The upper protection circuit clamps at around 7.5V
3. Item 1. and 2. are in line with a 5V tolerant input.
4. My interface circuit is very likely fine, despite what Ivan "Author of this idea should be sued !" Zilic says.

Does anybody take exception with these statements?

Hi,

awagner wrote:4. My interface circuit is very likely fine, despite what Ivan "Author of this idea should be sued !" Zilic says.

Before commenitng this one, I'd like to point out for other readers that after I wrote the message containing also this statement, I went to your web page, where various data there didn't fit into my picture about RasPi.
As a result, I notified you about this thread by sending you an email with link to it... I was curious, what are facts. So, this my email to you was obviously a reason that this discussion went on...

Many things are now more clear to me, thanks.

I must take the statement back. You should not be sued... not even after the last message (EDIT: referenced part: "I am very sorry, but while the Pi is a great project, its designer-team seems to be really weak on analog electronics. And they amplified that problem by not being able to give out the manufacturer info so others could make informed decisions based on that."), because disrespect is not a crime.
The pity is that you invest so much time in explaining, measuring, etc. and at the end there is not enough energy left to keep the ego within (according to my criteria) accepted boundaries.


Good luck, Ivan Zilic.

Interesting world-view you have there that quoting your statement back to you is "disrespect" and "ego". I advise a long, hard look into the mirror.

Anyways, no need to revise what I wrote (months ago) about interfacing the Pi to 5V logic. As to the issue of pull-up persistence, I will look into again and have added a statement to that effect to my web-page.

awagner wrote:I/O does not have "lifetime issues" unless heated up. The only two things to kill CMOS is heat (slowly) and gate-insulation breakdown (instantly).

I beg to differ. There is a phenomenon known as Time Dependent Dielectric Breakdown (TDDB). It is strongly affected by the applied voltage. See http://www.siliconfareast.com/oxidebreakdown.htm

I am aware of that effect. I admit that I should have limited the statement to well-designed I/O cells. (We are deeply into nit-picking now...) In any reasonable I/O cell design this effect will be under control and not play a role.

Of course, it is possible that the Pi SoC has broken I/O cells that were designed to be 5V tolerant but are not really and will die from this effect prematurely. That would then be a "trash" quality level chip. This type of chip exists, but not many manufacturers will put their logo on them. But if this is not a defective design (which I am speculating it is not), then anything up to 5.5V will not decrease I/O circuit lifetime.

That again shows the critical importance of the data-sheet. We are now reduced to speculate whether the I/O cells are a defective design or not. How pathetic is that?

The Broadcom SoC is not a microcontroller. It is not designed to have it's GPIO pins waving around in the open air picking up all sorts of inducted and broadcast noise. It is designed to be embedded in a closed consumer product such as a mobile phone. That is a very different environment. They are not I/O pins as such are normally understood. They are simply uncommitted, bidirectional pins such as might be used to connect a mobile phone SoC to the, well-behaved and physically close, keyboard processor or radio bloc.

It has been said, multiple times, that the GPIO pins are not protected against over-voltage and that over-voltage will damage the SoC.

I am sure that we would all like GPIO pins that were rated to a solid 20mA with heavy over and under voltage protection. But, given the choice, I would rather that the Raspberry Pi exists. Because such a SoC does not exist and adding that circuitry externally would have increased its price.

Similarly, it would be very nice if we had a full and complete datasheet. But, given the choice, I would rather that the Raspberry Pi exists. Because no SoC exists at the same price point, with a full datasheet. Even the datasheet we have is highly unusual and welcome, since Broadcom usually do not publish anything.

Nothing is perfect. I am sure there are "better" products out there, for some specific value of "better". That is a universal truth. The Raspberry Pi is what it is, it is very popular, and it is worth supporting. One of its less than perfect aspects is the lack of protection on the GPIO pins and the lack of specification on exactly what the circuitry is around them.

There are two possible responses to that situation. You can do research yourself and go beyond the published limits at your own risk. You can tell people what you have found. But please understand that it is at your own risk and theirs, and understand that others might decide that there may be a good reason for those limits, which you have discounted. Some people, including those with some degree of authority and responsibility, might want to warn people to stay within the published limits.

You misunderstand the current state-of-the-art. There are basically no "unprotected I/O pins" today. These were used very early in CMOS history and died so often that they completely went out of fashion. Nobody uses them today, except in very very special circuits. There are no "unprotected" pins for "internal" communication in a smart-phone or the like, unless you have these specifically manufactured for you and against better advice. The GPIO pins on the Pi SoC are protected against over- and under-voltage. That cannot really be in question at this point. That the protection is that typical for 5V tolerant I/O can also not be in question. (Otherwise they would just have left the upper protection diode in. It is there anyways in the FET geometry. Getting rid of it requires extra effort. A 7.5V clamping circuit requires extra effort.)

What the question is is whether the protection is that of a quality, mature I/O cell design or whether it is an immature or defective implementation or design. In the latter case, applying anything significantly above 3.3V may be fatal and it may be a very good idea to add the missing upper protection diodes externally. (In fact, using my interface circuit _with_ an external upper protection diode should be completely safe. I will add one for the paranoid, I think. And as "Liz" said 4.3V would be fine, that should satisfy all those more interested in what authority claims than in observable facts.) In the former case, all this is is a screw-up on the part of the Pi design team with regard to publishing documentation.

But well, I was dragged in here pretty much against my will by a clear accusation of gross incompetence, while facts are at the very least a lot murkier. An apology from the perpetrator is still outstanding, but I have an intuition that he does not understand the concept.

I should also add for all readers that this is an expert discussion. If you do not understand what exactly is being discussed here, don't take out one tidbit and use that. You may well kill your hardware that way.

As I cannot really rule out that Broadcom ships chips with defective I/O protection (there must be a reason they are sitting on this info after all...), here is the updated circuit:



Properties:

• * Interfaces 5V logic safely
  * GPIO pin stays at or below 4.3V, the "Liz"-approved value http://www.raspberrypi.org/archives/384#comment-5246
  * Fully bi-directional for up to 1 LS-TTL load (does not work with standard TTL, F, or other high input-current logics)
  * Requires pull-up resistors to be turned off or it will not work cleanly.
  * Does not work on pins with external pull-up resistors (I2C on pins 3 and 5).

Note: The 1N4148 stays at or below 1V dropped voltage for up to 10mA. That means we get 4.3V as input voltage to the Pi if we pump in something like 14V or more on the right-hand side.

Please comment. I really do not see any remaining safety issues or any collisions with information given by the dev team with my updated circuit. There is still no level-shifter needed for fully bi-directional operation. And you get a lot of added safety that protects the pin even when you accidentally connect the 5V side to 12V.

I would take issue with one point. The fault, if any, is with Broadcom, not the Pi design team. The Pi designers took what they were given and worked with it. They had no input on the design of the SoC, which was an existing design before they started. The most they did was to choose which SoC to use. Similarly, the ultimate decision on how much of the datasheet to expose is down to Broadcom. I was not party to the discussions regarding that, so I can't comment, but they do not usually publish anything without an NDA in place. That we got as much as we did is welcome; me might have ended up with nothing but a handful of binary libraries.

Well, we also could have ended up with a chip by a competitor and the full data-sheet, see for example the Beagle Bone.

But, yes, I do not know how the decision was reached either. You have your opinion about the data-sheet and I have mine. Let us just leave it at that, shall we?

BTW, I do not think that this issue decreases the overall accomplishment to any significant degree.

well, if I have learned one thing from this nit picking competition, it that I should not say such generalities as "if you cannot afford the second resistor to use a proper voltage divider, a 4K7 series resistor will give you basic protection", as it will come to haunt me. I actually do know and understand why I'm not permitted to say this anymore, its in the "nit-picking" region, but its rather the commercial/legal nit picking than the technical nit-picking. Ill keep it with that, and will in the future advice a proper resistor divider. thats all...

I have to say I am pretty satisfied with the outcome, despite the ugly start. With the diode in there, my interface circuit is now as perfect, safe and cheap as it can be with the available information, and still easy to use.

The divider-approach suffers from a number of problems:
- You have to get the resistor relation right, or it either (potentially) does damage or does not work
- It can slow things down too much, e.g. on the SPI bus
- it is not bi-directional, only works for inputs
- it does not provide protection against higher voltages

And it is not really cheaper anyways. The 1N4148 costs about the same as a resistor.

I'm Glad that you liked my trick with the diode in the power line to drop the 5V to 4.5V, I really had fun thinking that up, and I found it really works well.

Thats said, I have a few remarks about a resistor divider. addressing each point in your comment.

- You have to get the resistor relation right, or it either (potentially) does damage or does not work

The range of divisions that work are really quite large! But obviously a divider only works to lower the voltage, so it only works from say 5V to the 3V3 input level. I'm told that about 2.6V is the PI's lower input level, so any division that divides from 5V to the range between 2.6 and 3.3V will work! So even when you use two exactly the same resistors (50% lower) than it almost works. But I normally simply use 3K3 and 2K2 as these are E12 range resistors and the division is easy to understand, (3.3 + 2.2 is 5.5) so 5.5V will divide to 2.2V and 3.3V, almost exactly right, if you use 3K3 for the lower resistor then it will receive a fractional lower voltage than 3,3V (same difference ratio as 5.5 and 5.0V, so just 5% lower).

- It can slow things down too much, e.g. on the SPI bus

Not really! it's only "slower" because of the RC time of the resistors and any parasitic input capacitances of the GPIO (a few picofarad), you won't note that with frequencies lower than thousands of kilohertz.

- it is not bi-directional, only works for inputs

Not true in the sense that the 3V3 GPIO output signal can easily drive the 3K3 lower resistor high ( it only needs 1mA to do that), and normally the 2K2 resistor won't make a difference for the high input impedance of the receiver of the PI's 3V3 signal, so it will still receive 3.3V!

- it does not provide protection against higher voltages

True, a divider rated for a 5V signal will still try to put 8V on the GPIO pin if you connect a 12V signal, I suggest you don't do that! If you think you can't prevent that from happening, put a 3V6 zener over the 3K3 resistor.