James Adams
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Re: Preliminary B+ HATs docs/specs are here

Tue Jul 22, 2014 12:17 pm

Both good points, I've updated the docs.
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Re: Preliminary B+ HATs docs/specs are here

Tue Jul 22, 2014 12:22 pm

James Adams wrote:
do the older boards now have a need to not use I2C address 0, on the bus before the switch around? And there is the obvious omission of a 3V3 within the new pins.
Not quite sure I understand the question.
Got it. Just me being muddled for a while. It all sounds a bit like the apple mac color bus with ROMs on board the cards. A nice idea. Perhaps a URL to the driver should also be in the ROM, to allow dynamic updating without reflashing, but would this need a reboot, or just a insmod?

I can see a market for 40 to (26 + 14) splitter cables, and this is where a lack of 3V3 within the new pins would complicate the issue. This would make the most likely solution (for some) be a 40 to 2*26 way (one reversed for best spacing), with some allocation of new pins to old pins on the secondary socket.

I think something like this would give some help to small 26 way board producers and users that their boards will still get used. It does seem a bit of a waste to junk them.
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Re: Preliminary B+ HATs docs/specs are here

Tue Jul 22, 2014 1:22 pm

FLYFISH TECHNOLOGIES wrote:Additionally, information if clock stretching is supported would also be valuable.
Thanks & Best wishes, Ivan Zilic.
As I understand it, clock stretching is a bit buggy.
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Re: Preliminary B+ HATs docs/specs are here

Tue Jul 22, 2014 2:03 pm

jamesh wrote:
FLYFISH TECHNOLOGIES wrote:Additionally, information if clock stretching is supported would also be valuable.
Thanks & Best wishes, Ivan Zilic.
As I understand it, clock stretching is a bit buggy.
You can always bit-bang I2C ...

From what I understand, the I2C engine inside the SoC doesn't look at the clock to see if its being stretched (ie. held low by a slave device) and carries on clocking regardless.

Stick to stuff that doesn't clock-stretch. I had an interesting time writing the RTC code in the m48p that lives on the Gertduino board - you don't really have much time at 8MHz between taking the I2C address and 'acking' that (which releases the clock).

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Re: Preliminary docs are up

Tue Jul 22, 2014 2:27 pm

gordon@drogon.net wrote:
rotwang wrote:Just recap for me, is device tree support (which would be a god-send for the compute module) coming, coming real-soon-now(tm), or dead in the water.
As I see it, the CM isn't "general purpose" - it will be built into specific applications with a specific set of drivers compiled into the kernel for that application (and no more - or at least that's the way it would be were I designing it into something). I don't see that having an ID system for the CM would give it anything... But I could be wrong!

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I'd like to be able to say, shift a peripheral block, such as the UART, to one of its alternate sets of pins, and it would be a bl**dy nuisance to have to recompile a kernel to do it.

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Re: Preliminary B+ HAT (Hardware Attached on Top) docs/specs

Tue Jul 22, 2014 2:50 pm

As a hardware provider I don't care.
I already have to juggle a lot of balls, one is that the low price of the Raspberry-Pi forces plug-ons to be in a low price bracket.

I don't see any cheap solution for stack-able headers thus I would not have stuck to any standard which recommends them.

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Re: Preliminary B+ HAT (Hardware Attached on Top) docs/specs

Tue Jul 22, 2014 4:04 pm

So apart from not driving pin 36 from a hat (in case of old firmware booting), and a P1-13 collision??? there appear to be few limits. It's just most hardware is socket interface defined first, not in terms of 3 or 4 mappings of GPIO.

EDIT: I suggest a bold

PIN 31 AND 36 ARE NOT ADVISED TO BE INPUTS, TO ALLOW ACCIDENTAL OLD FIRMWARE BOOTING. THE UART, I2C AND SPI ARE ADVISED TO BE USED FOR THESE FUNCTIONS, AND SHOULD BE REALLOCATED FOR HATS LAST. NEVER USE PIN 8 AS AN INPUT.

EDIT2: 28-way mini hats might be quite interesting.
EDIT3: Response to below post: Maybe so.
Last edited by jackokring on Tue Jul 22, 2014 5:03 pm, edited 1 time in total.
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Re: Preliminary B+ HAT (Hardware Attached on Top) docs/specs

Tue Jul 22, 2014 4:57 pm

EDIT: I suggest a bold
Which makes it just a blurb of letters and numbers...

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Re: Preliminary B+ HAT (Hardware Attached on Top) docs/specs

Tue Jul 22, 2014 5:29 pm

jackokring wrote: EDIT2: 28-way mini hats might be quite interesting.
This is an interesting idea. 28 pins plus left-most 2 mounting holes would make for cheaper boards due to board area. You'd lose a lot of functionality provided by the extra set of pins (including i2s) though.

What shall we call mini hats?

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Re: Preliminary B+ HAT (Hardware Attached on Top) docs/specs

Tue Jul 22, 2014 5:31 pm

caps ?
toupe's?
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Re: Preliminary B+ HAT (Hardware Attached on Top) docs/specs

Tue Jul 22, 2014 5:42 pm

mikronauts wrote:caps ?
toupe's?
Toupis?

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Re: Preliminary B+ HAT (Hardware Attached on Top) docs/specs

Tue Jul 22, 2014 6:01 pm

mikronauts wrote:toupe's?
:D :D :D :D :D

Bobbles?
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Re: Preliminary B+ HAT (Hardware Attached on Top) docs/specs

Wed Jul 23, 2014 4:59 am

Could a half-sized HAT be a CAP (Card Attached to Periphery) or is that a bit too close to a Beaglebone Cape?

(However, if all it is is a B card that can use the newly positioned mounting holes then I doubt it is worth doing a new spec etc for it)

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Re: Preliminary B+ HAT (Hardware Attached on Top) docs/specs

Wed Jul 23, 2014 12:36 pm

Can I ask some really dumb questions?
* If I'm developing a simple add-on board for the B+ that uses the 40 pins as they've been specified, do I _need_ to worry about the EEPROM? i.e. If you don't connect anything to the EEPROM pins, does it really matter?
* Presumably if I'm developing a GPIO board that I want to work with the B and the B+, so therefore I just use the first 26 pins, then I don't need to worry about the EEPROM?

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Re: Preliminary B+ HAT (Hardware Attached on Top) docs/specs

Wed Jul 23, 2014 12:41 pm

recantha2 wrote:Can I ask some really dumb questions?
* If I'm developing a simple add-on board for the B+ that uses the 40 pins as they've been specified, do I _need_ to worry about the EEPROM? i.e. If you don't connect anything to the EEPROM pins, does it really matter?
You can design and produce any board you like, but you can't call it a HAT unless it adheres to the mandatory portions of the specification.
* Presumably if I'm developing a GPIO board that I want to work with the B and the B+, so therefore I just use the first 26 pins, then I don't need to worry about the EEPROM?

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Same as the last statement - nothing stopping you but you can't call it a HAT. I think we shall support 28-pin HATs but it's not baked into the specification yet.
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Re: Preliminary B+ HAT (Hardware Attached on Top) docs/specs

Wed Jul 23, 2014 2:57 pm

But if you use 28 pins, you can get it to auto-configure on a B+.
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Re: Preliminary B+ HAT (Hardware Attached on Top) docs/specs

Wed Jul 23, 2014 3:24 pm

Hi James, we're eagerly waiting the final documents for this as it will allow us to move forward and support our shared customers appropriately.

At the moment, if I understand correctly, we have the option of creating add on boards with or without the EEPROM. Whichever variant we should be using the PCB footprint already published with the camera and screen cable cut outs being optional.

So if someone was to create a board to the defined PCB footprint, with or without cut-outs, with or without EEPROM the foundation would find this acceptable and these boards would not be frowned upon?


Gordon

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Re: Preliminary B+ HAT (Hardware Attached on Top) docs/specs

Wed Jul 23, 2014 3:55 pm

We're aiming to freeze the spec by the end of the week, Monday latest so I would caution anyone taking what is there as 100% until then.
At the moment, if I understand correctly, we have the option of creating add on boards with or without the EEPROM. Whichever variant we should be using the PCB footprint already published with the camera and screen cable cut outs being optional.

So if someone was to create a board to the defined PCB footprint, with or without cut-outs, with or without EEPROM the foundation would find this acceptable and these boards would not be frowned upon?
As of the current spec yes this is OK (but I'll say again we're still changing the spec but it is 'solidifying'). - as jdb says though we are probably going to mandate that only things that use a 40W connector with the recommended board outline and support EEPROM can officially be called HATs.
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Re: Preliminary B+ HAT (Hardware Attached on Top) docs/specs

Wed Jul 23, 2014 6:01 pm

jdb wrote:I think we shall support 28-pin HATs but it's not baked into the specification yet.
Back to the flippant track ... that could be a Top Hat ;)

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Re: Preliminary B+ HAT (Hardware Attached on Top) docs/specs

Wed Jul 23, 2014 11:21 pm

I guess a simple (the simplest?) mini-HAT could just be a B+ -> B 'adaptor' with a 28-pin socket underneath and a 26-pin header on top, where the EEPROM simply configures the GPIOS on the B+ to function the same as they do on the Model B, to allow all the 'old' addon boards to work on the B+ with newest (gpioman) firmware?

Edit: Although once there are enough B+s out in the wild I expect that most of the old 26-pin addon boards will be supplemented by equivalent new 40-pin addon boards... 8-)

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Re: Preliminary B+ HAT (Hardware Attached on Top) docs/specs

Thu Jul 24, 2014 1:12 am

From what I remember, there are roughly 3M A&B's out there in total.

Not having the eeprom does not make the A/B style add-on's obsolete, they just won't auto configure like they could with the eeprom.

I am pretty sure there will be more than 3M A+ & B+'s in less than two years.
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Re: Preliminary B+ HAT (Hardware Attached on Top) docs/specs

Thu Jul 24, 2014 8:44 am

In the documents, when it comes to EEPROM devices, it specifically mentions that they must be 16 bit devices.
I assume that this means the device memory is addressable using 16 bit values (i.e. > 256x8 <= 65536x8) that are supplied over I2C. I have some CAT24C256LI-G 32Kx8 devices which I assume will be suitable.

On a related note, when will the EEPROM tools referred to be available? Presumably this will be after the specs are frozen.

Will there be an option to have the relevant tool fill in the device GUID for you, or will we need to generate them ourselves?
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Re: Preliminary B+ HAT (Hardware Attached on Top) docs/specs

Thu Jul 24, 2014 8:45 am

Paul Webster wrote:
jdb wrote:I think we shall support 28-pin HATs but it's not baked into the specification yet.
Back to the flippant track ... that could be a Top Hat ;)
Hmm, given that it would be smaller, I think a Pork Pi Hat would be more appropriate...
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Re: Preliminary B+ HAT (Hardware Attached on Top) docs/specs

Thu Jul 24, 2014 10:38 am

I have some CAT24C256LI-G 32Kx8 devices which I assume will be suitable.
Yes that device will be suitable.
On a related note, when will the EEPROM tools referred to be available? Presumably this will be after the specs are frozen.
Tools have been posted but are 'alpha' - i.e. under active development.

Yes we can probably add an option to automatically fill in the GUID but first cut we don't have this.
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Re: Preliminary B+ HAT (Hardware Attached on Top) docs/specs

Thu Jul 24, 2014 10:44 am

Are there plans for a directory for HATs ?

Is there an expectation for uniqness for ID's ?

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