Go to advanced search

by turboscrew
Sat Feb 04, 2017 11:37 am
Forum: General discussion
Topic: 433 MHz radio and antenna?
Replies: 0
Views: 645

433 MHz radio and antenna?

This may be a bit off-topic, but... Can anyone tell me how to solder a spring antenna to a 433 MHz radio card? That is, is there a certain length of straight part that needs to be left between the board and the "coil-part"? The antenna: https://www.aliexpress.com/item/Free-Shipping-433MHZ-spring-ant...
by turboscrew
Thu Apr 07, 2016 7:08 am
Forum: Bare metal, Assembly language
Topic: RPi, RPi2 and RPi0 firmware compatibility?
Replies: 7
Views: 1782

Re: RPi, RPi2 and RPi0 firmware compatibility?

Just setting the mode to SVC doesn't work. You have to "return" to SVC mode. mrs r0, cpsr and r1, r0, #0x1f cmp r1, #0x1a @ HYP-mode? bne start1 ldr sp, =__hyp_stack @ hard to set later movw r0, #0x1d3 @ aif-masks set, SVC-mode, other bits zeroed @ rough write in cpsr doesn't work - see pseudo code ...
by turboscrew
Thu Apr 07, 2016 6:55 am
Forum: Bare metal, Assembly language
Topic: Dynamic Debugging ARM?
Replies: 1
Views: 1099

Re: Dynamic Debugging ARM?

At least for RPi 2B you can use ddd (graphical front end to gdb) and my rpi_stub.
https://github.com/turboscrew/rpi_stub
by turboscrew
Sat Dec 05, 2015 1:16 pm
Forum: Bare metal, Assembly language
Topic: Weird behaviour of the "official" gcc
Replies: 22
Views: 4165

Re: Weird behaviour of the "official" gcc

But I think something doesn't add up: optimization level shouldn't affect the language. @JacobL: the problemis inverse: the errors are found with lower optimization level. I think a compiler shouldn't accept erroneous code even if it can compile it (making some assumptions) independent of optimizati...
by turboscrew
Fri Dec 04, 2015 8:12 am
Forum: Bare metal, Assembly language
Topic: Weird behaviour of the "official" gcc
Replies: 22
Views: 4165

Re: Weird behaviour of the "official" gcc

The difference of error checking with different optimization levels is still odd.
Should that be reported somewhere?
by turboscrew
Wed Dec 02, 2015 2:51 pm
Forum: Bare metal, Assembly language
Topic: Weird behaviour of the "official" gcc
Replies: 22
Views: 4165

Re: Weird behaviour of the "official" gcc

Well, I don't really need all the 32 bits for the baud rate as a decimal number. Now I just can't use the highest bit, but it's really not a problem. There were some other stupid things as well, like inline assembly that was sensitive for messing up LR. Changed them to naked and things started worki...
by turboscrew
Tue Dec 01, 2015 10:37 am
Forum: Bare metal, Assembly language
Topic: Weird behaviour of the "official" gcc
Replies: 22
Views: 4165

Re: Weird behaviour of the "official" gcc

It looks like the problem is that when compiled with '-mfpu=neon-vfpv4' the compiler uses Neon for long longs. And the Neon wasn't enabled yet. 382:../util.c **** tmp2 = 0LL; 1582 .loc 1 382 0 1583 0e18 1000C0F2 vmov.i32 d16, #0 @ di 1584 0e1c 050B4BED fstd d16, [fp, #-20] @ int 383:../util.c **** w...
by turboscrew
Mon Nov 30, 2015 11:17 pm
Forum: Bare metal, Assembly language
Topic: Weird behaviour of the "official" gcc
Replies: 22
Views: 4165

Re: Weird behaviour of the "official" gcc

That came to my mind too - as I didn't find anything suspicious from the assembly.
I already doubled the stack but haven't tried it out yet. I wanted to get the Neon support
finished first. I'll continue digging...
by turboscrew
Sun Nov 29, 2015 1:13 pm
Forum: Bare metal, Assembly language
Topic: Weird behaviour of the "official" gcc
Replies: 22
Views: 4165

Re: Weird behaviour of the "official" gcc

I compared the asm generated with -O0 and -O2 (the veneers) and they looked similar - of course addresses were changed, but looked believable, so I think the problem must be in some of those other calls... I'll keep digging... Yes, it seems to crash in the first string function. Funny that i does su...
by turboscrew
Sun Nov 29, 2015 12:59 pm
Forum: Bare metal, Assembly language
Topic: Weird behaviour of the "official" gcc
Replies: 22
Views: 4165

Re: Weird behaviour of the "official" gcc

Putting 'main' in the .text.startup didn't help. It still crashes id -O0 is used. With -O2 it works fine. Another weird thing is that the 'main' calls some other fúnctions (like LED blinking) in the 0x1f000000 area before trying to enter loader_main, and those calls seem to work. At least the LED bl...
by turboscrew
Fri Nov 27, 2015 11:32 pm
Forum: Bare metal, Assembly language
Topic: Weird behaviour of the "official" gcc
Replies: 22
Views: 4165

Re: Weird behaviour of the "official" gcc

The long jump from 0x8000-area to 0x1f000000-area seems to end up in reset. Well maybe I'll try to figure it out later. That's not critical, because with -O2 it works fine and I can probably make it work with all optimization levels with not too much effort. I'm curious - I must admit - about the ca...
by turboscrew
Fri Nov 27, 2015 7:09 am
Forum: Bare metal, Assembly language
Topic: Weird behaviour of the "official" gcc
Replies: 22
Views: 4165

Re: Weird behaviour of the "official" gcc

The code copy happens in .init - right after dealing with the hyp-mode. Could it be because the MMU and caches are set up in the .text2 (high-address) section in the function 'loader_main' that is called by 'main'? The compiler puts 'loader_main' before 'main'. The whole code is here: https://github...
by turboscrew
Fri Nov 27, 2015 12:11 am
Forum: Bare metal, Assembly language
Topic: Weird behaviour of the "official" gcc
Replies: 22
Views: 4165

Re: Weird behaviour of the "official" gcc

Well, I'm using C (and asm) not C++, so I don't care about constructors or destructors. What I wondered about the inline is that with -O0 it gave an error (and didn't produce a .elf), but with -O2 it didn't give any errors or warnings, but compiled and run well. My code placement looks like this: .t...
by turboscrew
Thu Nov 26, 2015 12:33 am
Forum: Bare metal, Assembly language
Topic: Weird behaviour of the "official" gcc
Replies: 22
Views: 4165

Re: Weird behaviour of the "official" gcc

It's bad for code-copy if the code to copy moves around depending on the optimization. :?

I guess that the other issue (non-static inline) doesn't have such explanation?
With -O0 compiler gives error, with -O1 it compiles and runs fine.
by turboscrew
Wed Nov 25, 2015 7:28 pm
Forum: Bare metal, Assembly language
Topic: Weird behaviour of the "official" gcc
Replies: 22
Views: 4165

Weird behaviour of the "official" gcc

I came across some weird behaviour of the "official" gcc: arm-linux-gnueabihf-gcc (crosstool-NG linaro-1.13.1-4.8-2014.01 - Linaro GCC 2013.11) 4.8.3 20140106 (prerelease) It doesn't detect same errors with different optimizations, and also sectioning changes. With -O0 I get errors about: inline ins...
by turboscrew
Tue Nov 17, 2015 9:04 am
Forum: Bare metal, Assembly language
Topic: RPi 2B program that uses FP/SIMD?
Replies: 0
Views: 466

RPi 2B program that uses FP/SIMD?

Does anyone happen to have a bare metal RPi 2B program that uses floating point and/or SIMD?
I'd like to use such for debugging rpi_stub single-stepping through floating point/SIMD instructions.
by turboscrew
Mon Nov 16, 2015 7:08 pm
Forum: Bare metal, Assembly language
Topic: floatingpoint exceptions of RPi 2B?
Replies: 2
Views: 754

Re: floatingpoint exceptions of RPi 2B?

OK, the FP/SIMD doesn't have any "real" exceptions. In a bad calculation, program doesn't crash, just the result is garbage.
by turboscrew
Sun Nov 15, 2015 11:06 am
Forum: Bare metal, Assembly language
Topic: floatingpoint exceptions of RPi 2B?
Replies: 2
Views: 754

floatingpoint exceptions of RPi 2B?

Does RPi 2B support "real" floating point/vector exceptions?
I've been trying to find out in the ARM ARM, and it looks like not - just bits in status register that need to be polled after operations.
If there are, where can I find out about them?
by turboscrew
Thu Nov 12, 2015 1:29 am
Forum: Bare metal, Assembly language
Topic: rpi_stub for debugging
Replies: 0
Views: 520

rpi_stub for debugging

I've been writing a bare metal gdb standalone stub or remote server or agent - whatchacallit (rpi_stub) for Raspberry Pi 2B. It runs from SD-card and uses serial cable for communicating with gdb. It can load a program (elf) via gdb 'load'-command and run it, it handles SW breakpoints and HW watchpoi...
by turboscrew
Mon Nov 09, 2015 10:59 pm
Forum: Bare metal, Assembly language
Topic: RPi 2B watchpoints
Replies: 4
Views: 944

Re: RPi 2B watchpoints

Solved. It was the OS lock.
by turboscrew
Mon Nov 09, 2015 3:39 pm
Forum: Bare metal, Assembly language
Topic: RPi 2B watchpoints
Replies: 4
Views: 944

Re: RPi 2B watchpoints

False alarm: DBGAUTHSTATUS = 0xff.
DBGEN is high and invasive and non-invasibe secure and non-secure debug is enabled.
by turboscrew
Mon Nov 09, 2015 1:49 pm
Forum: Bare metal, Assembly language
Topic: RPi 2B watchpoints
Replies: 4
Views: 944

Re: RPi 2B watchpoints

Is it a Linux-specific thing...
Apparently not.

The problem seems to be the DBGEN-signal. Does that mean that a jtag POD (or something) is required, or is there way to change the DBGEN signal state by a program?
by turboscrew
Mon Nov 09, 2015 12:11 am
Forum: Bare metal, Assembly language
Topic: RPi 2B watchpoints
Replies: 4
Views: 944

Re: RPi 2B watchpoints

Found this in Linux sources: /* * In order to access the breakpoint/watchpoint control registers, * we must be running in debug monitor mode. Unfortunately, we can * be put into halting debug mode at any time by an external debugger * but there is nothing we can do to prevent that. */ Is it a Linux-...
by turboscrew
Sun Nov 08, 2015 7:51 pm
Forum: Bare metal, Assembly language
Topic: RPi 2B watchpoints
Replies: 4
Views: 944

RPi 2B watchpoints

Has anyone used the watchpoints? I've been trying to get them to generate debug events, but nothing. There should be 4 watchpoints accordíng to DBGDIDR, DBGDSCR=0x0204000e, so there shouldn't be any problems there? I tried both the cp14 interface and the memory mapped interface - write DBGWVR0 and D...
by turboscrew
Sun Nov 08, 2015 7:46 pm
Forum: Bare metal, Assembly language
Topic: RPi 2b (Cortex A7) instruction timing?
Replies: 17
Views: 3851

Re: RPi 2b (Cortex A7) instruction timing?

Thanks. The timing problem has passed (I read the system timer), but otherwise interesting document.

Go to advanced search