Go to advanced search

by ceggers
Tue Oct 24, 2017 3:47 pm
Forum: Interfacing (DSI, CSI, I2C, etc.)
Topic: Error in GPIO interrupt handling
Replies: 7
Views: 3167

Re: Error in GPIO interrupt handling

- When I BUILD the test executable under Raspbian and RUN under Raspbian, NO interrupts are lost.
- When I BUILD the test executable under Debian and RUN under Raspbian, about 10 interrupts are lost.

...
by ceggers
Tue Oct 24, 2017 2:56 pm
Forum: Interfacing (DSI, CSI, I2C, etc.)
Topic: Error in GPIO interrupt handling
Replies: 7
Views: 3167

Re: Error in GPIO interrupt handling

I can't even reproduce your experiment in your first post: I get a 100 increment whether your program runs or not. Raspbian image 2017-09-07. - I can confirm that my bug seems not to appear on Raspian image 2017-09-07. - My problem is perfectly reproducible on Debian (https://jrwr.io/rpi/) Thank yo...
by ceggers
Mon Oct 23, 2017 8:00 am
Forum: Interfacing (DSI, CSI, I2C, etc.)
Topic: Error in GPIO interrupt handling
Replies: 7
Views: 3167

Re: Error in GPIO interrupt handling

After some days of investigation I'm quite sure, that the GPEDS register of the GPIO controller is not implemented correctly (controller bug). In my software I directly access the peripherals from userland. And in my experience, the event detect status register works fine. What I've found is quite ...
by ceggers
Mon Oct 23, 2017 7:20 am
Forum: Interfacing (DSI, CSI, I2C, etc.)
Topic: Error in GPIO interrupt handling
Replies: 7
Views: 3167

Re: Error in GPIO interrupt handling

Depending on what you are trying to achieve you may get more useful results by using pigpio . By default it doesn't use Linux interrupts to monitor the GPIO state so will bypass any limitations of the hardware event registers. pigpio looks quite interesting, but it seems that it uses "samling&...
by ceggers
Fri Oct 20, 2017 1:47 pm
Forum: Interfacing (DSI, CSI, I2C, etc.)
Topic: Error in GPIO interrupt handling
Replies: 7
Views: 3167

Error in GPIO interrupt handling

Hardware: RPi 3B I have problems with consecutive interrupts (edge triggered) on two different GPIO pins. In my application, the second interrupt often appears about 5 µs after the first interrupt. When the 2nd IRQ (e.g GPIO6) arrives exactly when the 1st IRQ (e.g. GPIO5) is handled, the 2nd IRQ wil...

Go to advanced search