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by nikkov
Wed Jun 27, 2012 7:54 am
Forum: Interfacing (DSI, CSI, I2C, etc.)
Topic: STICKY: The I2S sound thread.
Replies: 925
Views: 455113

Re: I2S: Anyone got it running?

Actually upon re-reading this section, it sounds to me like this is likely to be an internal clock source coming from the clock generation blocks, which are not defined in this datasheet. So I'm here and ask about it :) Definitely sounds like it's the serial bit clock though, not the DAC master clo...
by nikkov
Wed Jun 27, 2012 6:06 am
Forum: Interfacing (DSI, CSI, I2C, etc.)
Topic: STICKY: The I2S sound thread.
Replies: 925
Views: 455113

Re: I2S: Anyone got it running?

MCLK - This is the DAC master clock, depending on the DAC you choose the requirements may be different. Systems using I2S to transfer digital audio data don't usually require it (e.g. to convert to SPDIF). It's typically an oversampled clock at 256 x Fs (ie. 11.289.600Hz for 44.1KHz). It's typicall...
by nikkov
Tue Jun 26, 2012 2:45 am
Forum: Interfacing (DSI, CSI, I2C, etc.)
Topic: STICKY: The I2S sound thread.
Replies: 925
Views: 455113

Re: I2S: Anyone got it running?

Gert van Loo wrote:
-> PCM_MCLK: is a fixed clock at 3.072Mhz (really fixed?)
I have to ask about that one. I am not familiar with it.
Hi Gert,

Can you explain any info about what's PCM_MCLK? Can I use an external master clock for PCM_MCLK?

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