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by swarren
Fri May 26, 2017 6:42 pm
Forum: Device Tree
Topic: device tree overlays and U-Boot
Replies: 32
Views: 12430

Re: device tree overlays and U-Boot

3- cd u-boot , make rpi_3_32b_defconfig , make -j4 4- I get the u-boot.bin , then copy it to /boot 5- add kernel=u-boot.bin to config.txt That's probably the problem. The RPi 3 is a 64-bit system by default, but you've built a 32-bit U-Boot. "make rpi_3_defconfig" instead, or use config.txt entries...
by swarren
Fri May 26, 2017 5:44 pm
Forum: Device Tree
Topic: device tree overlays and U-Boot
Replies: 32
Views: 12430

Re: device tree overlays and U-Boot

Where are you getting your u-boot source (or binary) from? Yes you are right. Now I got the binaries from: git clone git://github.com/swarren/u-boot.git Well, there aren't any binaries in that repository... I assume you meant you got the source from there. Also, that's the wrong repository to use. ...
by swarren
Thu May 25, 2017 7:52 pm
Forum: Advanced users
Topic: Why does /proc/cpuinfo always show the same serial number?
Replies: 8
Views: 3647

Re: Why does /proc/cpuinfo always show the same serial numbe

I believe U-Boot's serial number is actually correct here, but serialnumber_mailbox.c is wrong. https://github.com/raspberrypi/firmware/wiki/Mailbox-property-interface states that the response from the "get board serial" mailbox function is a 64-bit serial number. However, serialnumber_mailbox.c onl...
by swarren
Thu May 25, 2017 1:41 pm
Forum: Device Tree
Topic: device tree overlays and U-Boot
Replies: 32
Views: 12430

Re: device tree overlays and U-Boot

@ahmedawad, U-Boot sets environment variable $fdt_addr to the address of the DTB provided by the firmware. If you want to pass that to the kernel, you need to (a) pass that value to bootz rather than the address of any DTB that U-Boot loaded, (b) not load a DTB from U-Boot. For example, your boot sc...
by swarren
Fri Apr 22, 2016 6:41 pm
Forum: HATs and other add-ons
Topic: CLAC not HAT compatible like it claims?
Replies: 3
Views: 1612

Re: CLAC not HAT compatible like it claims?

Can anyone from the Pi Foundation or CLAC manufacturer comment on this?
by swarren
Fri Apr 08, 2016 2:07 pm
Forum: Bare metal, Assembly language
Topic: Bare metal in qemu - serial port?
Replies: 6
Views: 4190

Re: Bare metal in qemu - serial port?

On track HW, either UART can be connected to the GPIO headers. The GPIO HW module contains pinmux registers that control which UART is routed to which pins. By default the VC FW connects the PL011 to the GPIO header pins on the Pi 0/1/2 and the mini UART on the Pi 3, although DT overlay options in c...
by swarren
Thu Apr 07, 2016 4:58 am
Forum: Device Tree
Topic: device tree overlays and U-Boot
Replies: 32
Views: 12430

Re: device tree overlays and U-Boot

PhilE wrote:That would be true on a system with a 1/3 kernel/user split, but we use a 2/2 split so it's all low mem.
That's presumably a configuration quirk specific to the Pi Foundation's kernel, and is not true for mainline Linux?

Sorry for the late reply; I guess I wasn't subscribed to this thread.
by swarren
Thu Apr 07, 2016 2:51 am
Forum: Bare metal, Assembly language
Topic: Entering aarch64 execution state
Replies: 171
Views: 76767

Re: Entering aarch64 execution state

There are almost certainly HW modules that specs won't be published for and/or physically can't be accessed from the ARM CPU due to the way the SoC is constructed internally. The VC FW will always have to manage those. I'd expect the rest to converge on control via the ARM CPU though. Eric is making...
by swarren
Thu Apr 07, 2016 2:29 am
Forum: Bare metal, Assembly language
Topic: Entering aarch64 execution state
Replies: 171
Views: 76767

Re: Entering aarch64 execution state

Ah right - multiple pieces of SW using the same registers. Perhaps this is nit-icking over terminology, but I guess I wouldn't call that just an address space conflict; the conflict is regarding control of logic in HW module itself, not just the address space used to access it. I would assume that, ...
by swarren
Thu Apr 07, 2016 2:07 am
Forum: Bare metal, Assembly language
Topic: Entering aarch64 execution state
Replies: 171
Views: 76767

Re: Entering aarch64 execution state

I noticed that u-boot doesn't have much of a menu system, but it supports PXE boot. I wonder how hard it would be to get syslinux to work so that people can have a menu system for choosing the kernel to boot. Say 32 bit for actual use for now, and 64 bit kernel for testing and messing around. Perha...
by swarren
Thu Apr 07, 2016 2:03 am
Forum: Bare metal, Assembly language
Topic: Entering aarch64 execution state
Replies: 171
Views: 76767

Re: Entering aarch64 execution state

What does "Some of it has to do with configuration conflicts in the address space." mean, in detail? I don't see how there would be any difference between the 32-bit and 64-bit ports here as far as a standard kernel driver is concerned. Equally, FW-vs-not shouldn't influence anything here either.
by swarren
Thu Apr 07, 2016 1:59 am
Forum: Bare metal, Assembly language
Topic: Firmware question?
Replies: 38
Views: 4873

Re: Firmware question?

to: dwelch An OS has to leave hyp-mode as soon as possible after booting in order to set up the security registers and security related vectors and traps and what have you. This can only be done from a secure world. And hyp-mode is unsecure by definition. I have no clue why the pi is switched to hy...
by swarren
Wed Apr 06, 2016 2:13 am
Forum: Bare metal, Assembly language
Topic: Firmware question?
Replies: 38
Views: 4873

Re: Firmware question?

On ARM64 the exception levels are named a bit more sanely, so I'll mainly use that terminology, but I believe everything below applies equally to ARM32 if you substitute the correct CPU mode names etc. The CPU boots in EL3 (~SVC). This typically runs a secure monitor. Hypervisors run in EL2 (HYP). A...
by swarren
Wed Apr 06, 2016 2:03 am
Forum: Bare metal, Assembly language
Topic: Entering aarch64 execution state
Replies: 171
Views: 76767

Re: Entering aarch64 execution state

I've only tested the spin table with the test app in my rpi-3-aarch64-demo repo. However, Eric Anholt got it working with the mainline kernel. It looks like that code is here: https://github.com/anholt/linux/commit/be4ac324fe5ab14816ab06a8fd956bb9897cd23a#diff-312c904c5fb48e9906d35bad1317b0ecR30 (t...
by swarren
Tue Apr 05, 2016 2:07 am
Forum: Bare metal, Assembly language
Topic: Firmware question?
Replies: 38
Views: 4873

Re: Firmware question?

It is a misunderstanding that a reset is needed for going to monitor-mode. Within the context I was talking about, that's not true. In general, code running at a privilege level less than the secure monitor cannot write to the memory containing the code of the higher privilege levels. It's an unusu...
by swarren
Mon Apr 04, 2016 10:49 pm
Forum: Bare metal, Assembly language
Topic: Entering aarch64 execution state
Replies: 171
Views: 76767

Re: Entering aarch64 execution state

printenv will show you the boot scripts. IIRC it searches for both boot.scr.uimg and boot.scr in /boot and / on the partition.
by swarren
Mon Apr 04, 2016 9:36 pm
Forum: Bare metal, Assembly language
Topic: Entering aarch64 execution state
Replies: 171
Views: 76767

Re: Entering aarch64 execution state

I've only tested the spin table with the test app in my rpi-3-aarch64-demo repo. However, Eric Anholt got it working with the mainline kernel. It looks like that code is here: https://github.com/anholt/linux/commit/be4ac324fe5ab14816ab06a8fd956bb9897cd23a#diff-312c904c5fb48e9906d35bad1317b0ecR30 (th...
by swarren
Mon Apr 04, 2016 8:18 pm
Forum: Bare metal, Assembly language
Topic: Entering aarch64 execution state
Replies: 171
Views: 76767

Re: Entering aarch64 execution state

In the ARM stub code I wrote, the CPU release address values are (IIRC) 0xe0, 0xe8, 0xf0. BTW, Eric Anholt mentioned to me on IRC that he'd just tested the spin table (with the mainline kernel I imagine) and found it worked fine.
by swarren
Sat Apr 02, 2016 2:55 pm
Forum: Bare metal, Assembly language
Topic: Entering aarch64 execution state
Replies: 171
Views: 76767

Re: Entering aarch64 execution state

Re: the LAN_RUN signal (9514 reset) - is the GPIO used, or signal polarity, different between different Pi variants? If using the upstream kernel, it could be that it's doing some GPIO/pinmux initialization that hasn't been fully updated for the RPi3, in either bit size. Dom, Is there a list of whic...
by swarren
Sat Apr 02, 2016 3:21 am
Forum: Bare metal, Assembly language
Topic: Bare metal in qemu - serial port?
Replies: 6
Views: 4190

Re: Bare metal in qemu - serial port?

-bios is the option you want. Here's my full script: #!/bin/bash # cd ~/git_wa/rpi # qemu-img convert -O vhdx 2015-09-24-raspbian-jessie.img qemu09.vhd #gdb="gdb --args" gdb= #qemu=/home/swarren/git_wa/qemu/build/arm-softmmu/qemu-system-arm qemu=/home/swarren/git_wa/qemu-0xabu/build/arm-softmmu/qem...
by swarren
Sat Apr 02, 2016 3:18 am
Forum: Bare metal, Assembly language
Topic: Entering aarch64 execution state
Replies: 171
Views: 76767

Re: Entering aarch64 execution state

FYI, RPi 3 64-bit support patches are posted for inclusion into mainline U-Boot: http://lists.denx.de/pipermail/u-boot/2016-April/250314.html [PATCH 1/2] ARM: allow CONFIG_GICV* not to be defined http://lists.denx.de/pipermail/u-boot/2016-April/250315.html [PATCH 2/2] ARM: add Raspberry Pi 3 64-bit ...
by swarren
Thu Mar 31, 2016 7:29 pm
Forum: Bare metal, Assembly language
Topic: Entering aarch64 execution state
Replies: 171
Views: 76767

Re: Entering aarch64 execution state

Yes, I believe that's the firmware repo I used, and I used the master branch.
by swarren
Thu Mar 31, 2016 6:57 pm
Forum: Bare metal, Assembly language
Topic: Entering aarch64 execution state
Replies: 171
Views: 76767

Re: Entering aarch64 execution state

The entire point of "enable_uart=1" is to fix the SoC clocks so that the mini UART is stable. The issue is indeed well known, and that is the fix for it. If that's not working, with the latest firmware, it should be reported.
by swarren
Thu Mar 31, 2016 6:29 pm
Forum: Bare metal, Assembly language
Topic: Bare metal in qemu - serial port?
Replies: 6
Views: 4190

Re: Bare metal in qemu - serial port?

That's odd; I ran (RPi 2) U-Boot on that same qemu and the serial port worked just fine. You are passing your bare metal code to qemu as a firmware image not as a kernel image right? That affects load address (I assume 0 vs 0x8000), and perhaps whether any DT/ATAGS are written to memory over the top...
by swarren
Thu Mar 31, 2016 6:26 pm
Forum: Bare metal, Assembly language
Topic: Firmware question?
Replies: 38
Views: 4873

Re: Firmware question?

Yes, the educational aspect makes sense. I was thinking more from a "production SW" perspective; anything one might want to share with other people and have it "just work" reliably for them. I haven't looked at the code anyone is using to do this yet. If you're resetting the CPU to get back out of H...

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