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by alexhoppus
Sat Mar 12, 2016 6:36 pm
Forum: Bare metal, Assembly language
Topic: What is spsr_cxsf
Replies: 1
Views: 1555

What is spsr_cxsf

Recently, we have discussed transition from hyp to svc mode at rpi2 boot in this topic https://www.raspberrypi.org/forums/viewtopic.php?f=72&t=138201 the final solution for this was something like: reset: // Assume we are in HYP mode mrs r0, cpsr bic r0, r0, #0x1F orr r0, r0, #SVC_MODE|I_BIT|F_BIT o...
by alexhoppus
Fri Mar 04, 2016 8:07 pm
Forum: Bare metal, Assembly language
Topic: Vector table init at rpi2
Replies: 25
Views: 4956

Re: Vector table init at rpi2

This startup code https://github.com/vanvught/rpidmx512/blob/master/rpi_dmx_usb_pro/firmware/vectors.s works on all Model 1's and Model 2 with latest firmware. Not yet tested with Model 3. That works for me! Thanks. But still can't catch the intention of this (why raw instructions?) .word 0xE12EF30...
by alexhoppus
Fri Mar 04, 2016 5:40 am
Forum: Bare metal, Assembly language
Topic: Vector table init at rpi2
Replies: 25
Views: 4956

Re: Vector table init at rpi2

I am struggling to get dradfords code to work to switch to svc. Anyone else have luck with that? The same thing. I thought for the first time that it is incorrect PC magic, and i jumping to wrong instruction, but it seems that there is something else. I don't know what happening concretely, but whe...
by alexhoppus
Wed Mar 02, 2016 5:40 pm
Forum: Bare metal, Assembly language
Topic: Vector table init at rpi2
Replies: 25
Views: 4956

Re: Vector table init at rpi2

I can get exceptions with this setup. thanks! mov sp, #0x8000 mov r0, #0x8000 mcr p15, 4, r0, c12, c0, 0 @Set HVBAR however if i try to do the same thing but for VBAR from the SVC mode it doesn't work. i.e.: # Goto SVC mode mrs r0, cpsr bic r0, r0, #0x1f orr r0, r0, #SVC_MODE msr cpsr, r0 mov sp, #0...
by alexhoppus
Wed Mar 02, 2016 1:20 pm
Forum: Bare metal, Assembly language
Topic: Vector table init at rpi2
Replies: 25
Views: 4956

Re: Vector table init at rpi2

Tried different variants including the one used in BUG()
http://lxr.free-electrons.com/source/ar ... /bug.h#L17
The undefinstr is happened (or at least some kind of exception is happened) bcause i can't see further printing
by alexhoppus
Wed Mar 02, 2016 12:01 pm
Forum: Bare metal, Assembly language
Topic: Vector table init at rpi2
Replies: 25
Views: 4956

Re: Vector table init at rpi2

That is not so obvious way of generating undefinstr exception. What i want to see is printing from exception_handler. I should make a comment about that.
by alexhoppus
Wed Mar 02, 2016 11:03 am
Forum: Bare metal, Assembly language
Topic: Vector table init at rpi2
Replies: 25
Views: 4956

Re: Vector table init at rpi2

I have done the following things: 1.) Set up stacks for every mode 2.) Initialized VBAR register to point to 0x0 3.) Insert a one char printing from exception handler directly to uart port 4.) I have looked into u-boot source early init and stole 1-3 things from there. Also i have mentioned that it ...
by alexhoppus
Tue Mar 01, 2016 8:41 pm
Forum: Bare metal, Assembly language
Topic: Vector table init at rpi2
Replies: 25
Views: 4956

Vector table init at rpi2

Hi! I have troubles with printing some info about occurred exception. As i mentioned in subj my target is rpi2 i.e. bcm2836 and cortex a-7 i followed this kind of setup https://github.com/dwelch67/raspberrypi/tree/master/mmu This is how vectors are initialized and copied to zeroth address .globl _st...
by alexhoppus
Tue Mar 01, 2016 8:18 pm
Forum: Bare metal, Assembly language
Topic: Rpi2 uart initialization
Replies: 2
Views: 1033

Re: Rpi2 uart initialization

I'am doing bare metal, thanks for the links - your github example works fine for me.
by alexhoppus
Sat Feb 13, 2016 9:10 am
Forum: Bare metal, Assembly language
Topic: Rpi2 uart initialization
Replies: 2
Views: 1033

Rpi2 uart initialization

I have found the following working rpi2 uart initialization sequence. mmio_write(AUX_ENABLES, 1); mmio_write(aux_mu_ier_reg, 0); mmio_write(aux_mu_cntl_reg, 0); mmio_write(aux_mu_mcr_reg, 0); /*This is a line iam asking about */ mmio_write(aux_mu_lcr_reg, 3); mmio_write(aux_mu_iir_reg, 0xC6); mmio_w...

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