Raspberry Pi Forums

dpotop

I found a workaround - creating a new SD card based on Raspbian Buster.
But this does not answer my previous question - what changed in the
RPI, while on the outside it's labeled in the same way.
Unsettling, when you use the cards for teaching.

Best,
Dpotop

dpotop

Hello, I'm teaching using Raspberry Pi 1 B+ cards and bare metal software. I've just got a new batch of Raspberry Pi B+ cards, which should be identical to those I already have. At least, they have the same markings: B+, V1.2, 2014. However, they will NOT boot using the same SW I use on the old ones...

dpotop

Hello, I'd like to execute code periodically on all cores. For instance, I'd like to launch every 10ms computations on all cores. These computations must start at the same time (as synchronized as possible). I look for the best way to do it. What I currently have is one timer (the "local timer") dri...

dpotop

Thanks LdB,

I had completely overlooked the Cortex-A53-specifics.

Is register CPUECTLR_EL1 the only one I should be concerned
with? Are there other registers of interest?
In the manual I see there are lots of "implementation-defined"
registers besides this one.

Regards,
Dumitru

dpotop

Hello, I have a weird problem - when booting in EL3 I can't seem to be able to enable coherency between cores. I have two boot settings: - in the first I boot in EL2 (classical) - in the second I boot in EL3 In both cases, the configuration for EL2 and EL1 is exactly the same, both for MMU and for p...

dpotop

Ok, so with your help (thank you again) I start to understand more of the ARM documents, and contribute productively to this discussion. I'm now looking into the "Programmer’s Guide for ARMv8-A", which can be found here: http://infocenter.arm.com/help/topic/com.arm.doc.den0024a/DEN0024A_v8_architect...

dpotop

No, with 64k granularity pages are on a 64k boundary (by definition). VA[47:29] is used as an index in the level 2 lookup (if used) to give the address of the level 3 table, VA[28:16] is used as an index in the level 3 lookup to give you PA[47:16], VA[15:0] gives you PA[15:0] directly. I guess the ...

dpotop

2. If T0SZ=39, I am again at L3, VAs have 25 bits. Then, bits [11:0] are always taken unchanged from the VA, and bits [24:12] are taken from the page descriptor. Right ? With 64K granularity then PA[15:0] = VA[15:0] Ok, but then, in the case mentioned above, the pages pointed to by two successive d...

dpotop

The DDI0487 document on page D5-2419 has a nice comparision table D5-13, called "TnSZ values for and input address rangesa for starting at this level" which compares possible values, and tells you the initial lookup level. In short, with 16k pages if you want to start at translation level 2, then y...

dpotop

Diagram D5-15 is for level 0, 1 & 2 descriptor formats, the level 3 page descriptor format is diagram D5-17 on page 2448. Excellent, thanks a lot! Can you also point me to the place where they explain how the initial translation level is chosen for Stage 1 translation? I only found a way to set it ...

dpotop

Hello, I try to reconfigure the MMU beyond what is done in the examples of LdB. I try to do this by building upon an example of ARMv8 ARM, which can be found here: https://static.docs.arm.com/ddi0487/da/DDI0487D_a_armv8_arm.pdf The example is the one in section K7.1.2, fig. K7-11, page 7293. I find ...

dpotop

Thanks a lot LdB - the first paragraphs in your link contained exactly the information I looked for.

Dpotop

dpotop

Hello,

There's a point I can't find the reference in the ARMv8 ARM - it's probably
there, but I just can't find it:

When an exception is taken (any type) are interrupts (IRQs and
FIQs) disabled?

Best regards,
Dpotop

dpotop

Cool !
But is the VideoCore initialized if I boot at address 0?
Will it reply to mailbox requests?

Best,
Dpotop

dpotop

RPi3 newbie question: I thought RPi3 is at EL2 when control is given to kernel8.img. So, how come you're at EL3?

Dpotop

dpotop

Dear LdB and bzt,

Thanks a lot, your insight into Linux booting is quite useful!

If the de-compressed Linux kernel can go between 0x8000 and 0x80000,
it also means I can load my code there, isn't it? I'll probably give it a try.

Best regards,
Dpotop

dpotop

Hello, I want to be sure about some details before starting to code some interrupt-related stuff. Can you please tell me if the following assumptions I make are correct? Even partial answers will help me. 1. The RPI3 inherits most of the memory-mapped SoC peripherals of the RPi1, with the difference...

dpotop

This week I did (in some spare time) exactly this - writing a loader over UART. I've had some issues with lost characters, too. It seems they were timing-related. After removing all spurious code on the RPi-side receiving code and adding a small consistency test in the writing loop on the PC side (w...

dpotop

I have no idea why only the Pi devs could answer that. Be cause the professionals live on it, whereas Pi developers are hobbyists and can afford to be open. :) And the Pi is the only platform where such a community developed. Too bad the information is not even more easily accessible. I wonder how ...

dpotop

Hello LdB, Thanks again. Starting from your code I managed to make critical sections work, after starting the caches. Do you have some reference for the synchronization code (the semaphores)? The semantics of the non-blocking "dec" looks a bit weird. I spent some time understanting it before I was a...

dpotop

Hello LdB, Thanks again for your reply and for the link to your source code. I'm now trying to understand it, and I have a question related to memory mapping and mailboxes, which I don't fully understand. The code that I don't understand is in your file: https://github.com/LdB-ECM/Raspberry-Pi/blob/...

dpotop

Thanks a lot to both of you.
Dpotop

dpotop

Hello everybody, After writing a small OS on the RPi1 (open-sourced here https://gforge.inria.fr/projects/rpi653), I'm now trying to make it work on the RPi3 multi-core. I start small, to understand the functioning of the multi-core. I am using this tutorial to make things work https://github.com/bz...

dpotop

Hello,

First of all, thanks a lot for these tutorials. They are excellent.

Concerning your "power" tutorial: you mention that most components of the PPi3 card can be shut down individually. But where can I get the doc on that?

Best,
Dpotop

dpotop

Thanks, it works.

Search found 78 matches

Re: Boot changes on Raspberry Pi 1 B+ ?

Boot changes on Raspberry Pi 1 B+ ?

Best way to synchronize timers?

Re: Coherency when starting in EL3

Coherency when starting in EL3

Re: MMU config of RPi3 - problem with ARMv8 ARM

Re: MMU config of RPi3 - problem with ARMv8 ARM

Re: MMU config of RPi3 - problem with ARMv8 ARM

Re: MMU config of RPi3 - problem with ARMv8 ARM

Re: MMU config of RPi3 - problem with ARMv8 ARM

MMU config of RPi3 - problem with ARMv8 ARM

Re: Taking an exception disables interrupts?

Taking an exception disables interrupts?

Re: EL switching

Re: EL switching

Re: RPi3 - start cores and spinlock sync code needed

Question on mailboxes on RPI3

Re: Mini UART eats some characters

Re: RPi3 - start cores and spinlock sync code needed

Re: RPi3 - start cores and spinlock sync code needed

Re: RPi3 - start cores and spinlock sync code needed

Re: RPi3 - start cores and spinlock sync code needed

RPi3 - start cores and spinlock sync code needed

Need docs!

Re: Sonic Pi : balance between left and right to create a rotating impression