Raspberry Pi talking to an FPGA

Ashwith Rego just successfully JTAG-programmed his Digilent Nexys3 FPGA board using the ARM build of FPGALink running on his Raspberry Pi, then wrote four bytes of data (0x12, 0x34, 0x56 & 0x78) to the FPGA:



The display shows "0114" which is a checksum of the data written (0x12 + 0x34 + 0x56 + 0x78 = 0x0114).

Here's the transcript of the RPi commands if anyone's interested.

Previously it had only been tested on QEmu, so it's nice to see it running on real ARM hardware!

Chris

Now the FPGA can be literally "Field Programmable" It'll be interesting to see how the GPIO and FPGA can talk to each other. I'm too scared to touch the GPIO for now so I'll wait for that. Thanks for telling me about this application.

It would be interesting to see what kind of data throughput is achievable on the RPi. You can try it by making sure you have 300MiB free on your RPi's local filesystem (not on a network drive) and doing a 300MiB read like this:

time ./linux.armel/rel/flcli -v 1443:0007 -a 'r0 0x12c00000 "bigFile.out"'

...and then writing the 300MiB file back:

time ./linux.armel/rel/flcli -v 1443:0007 -a 'w0 "bigFile.out"'

I'd expect each operation to take around 15-20 seconds.

I'll try this tomorrow. I don't have a very convenient 5V source for my FPGA board and I had planned to make one tomorrow. Let me know if you want any more experiments on this. I'll be able to put my Raspberry Pi to some good use.

Ooops, I forgot the RPi only has 256MiB of RAM. When your +5V supply is ready, try a 32MiB write/read instead:

./linux.armel/rel/flcli -i 1443:0007 -v 1443:0007 -x gen_csvf/ex_cksum_nexys3_fx2_vhdl.csvf
time ./linux.armel/rel/flcli -v 1443:0007 -a 'r0 0x2000000 "bigFile.dat"'
time ./linux.armel/rel/flcli -v 1443:0007 -a 'w0 "bigFile.dat"'

The write/read times should each be a couple of seconds. The numbers won't be very accurate because of the process startup and file load/save overhead (I should really put an option in to turn on benchmarking for each block write and read operation), but it'll at least give us an idea.

Chris

Chris,
Here are the results:

Code: Select all

root@raspberrypi:/home/ashwith/fpgalink/libfpgalink-20120621# ./linux.armel/rel/flcli -i 1443:0007 -v 1443:0007 -x gen_csvf/ex_cksum_nexys3_fx2_vhdl.csvf
Attempting to open connection to FPGALink device 1443:0007...
Playing "gen_csvf/ex_cksum_nexys3_fx2_vhdl.csvf" into the JTAG chain on FPGALink device 1443:0007...
root@raspberrypi:/home/ashwith/fpgalink/libfpgalink-20120621# time ./linux.armel/rel/flcli -v 1443:0007 -a 'r0 0x2000000 "bigFile.dat"'
Attempting to open connection to FPGALink device 1443:0007...
Executing CommFPGA actions on FPGALink device 1443:0007...

real    0m5.468s
user    0m0.040s
sys     0m0.940s
root@raspberrypi:/home/ashwith/fpgalink/libfpgalink-20120621# time ./linux.armel/rel/flcli -v 1443:0007 -a 'w0 "bigFile.dat"'
Attempting to open connection to FPGALink device 1443:0007...
Executing CommFPGA actions on FPGALink device 1443:0007...

real    0m1.794s
user    0m0.060s
sys     0m0.570s


Is there a way I can use FPGALink without logging into my root account or using sudo?

Hmm...so at least 32/5.468 = 5.8MiB/s read throughput and at least 32/1.794 = 17.8MiB/s write throughput...not brilliant, but not bad. The results for my desktop PC for the same test are 25.0MiB/s and 22.7MiB/s.

You should be able to specify a udev rule so that the OS grants user-level or group-level access to your device. This is covered in section 2.1 of the user manual.

Fpga on raspberry pi? Sounds really interesting!

I wonder if anybody have though of making a FPGA 'shield' for the raspberry pi. If possible, could you do the programming of the shield over the GPIO pins?

Also would it be possible to do the 'synthesis' of the bitstream in the RaspberryPi itself from VHDL before autoloading to the shield?

It sounds crazy to me, but I would love to see the changing of FPGA codes to be an 'sd card swap' away.

Unless you convinced an FPGA vendor to build their tools for ARM, or used an emulation layer to run the x86 synthesis tools on ARM, you're out of luck. The former is unlikely and the latter would take all day to synthesise even a simple design. You could probably run GHDL and maybe GTKWave on a Raspberry Pi, so you could do simulation work, but not synthesis.

However, there is nothing stopping you synthesising several designs on a PC and then loading the resulting bunch of bitstreams to a Raspberry Pi. The Pi could then load them into the FPGA over USB when needed, using FPGALink. You would not even have to switch SD cards to get a new design. You could even install the Pi+FPGA in a remote location and load new designs into the FPGA over the Internet.

This board I designed recently doesn't fit the usual definition of "shield" (i.e different form-factor, not "pluggable"), but it's cheap, open-source hardware and known to be compatible with the Raspberry Pi:

MakeStuff LX9 PCB
MakeStuff LX9 blinky
MakeStuff LX9 speed test

It has a Xilinx XC6SLX9 FPGA, 16MiB of SDRAM, a 1Mib EEPROM, an SD-card slot and about 50 general-purpose I/Os. You can access the FPGA's JTAG for programming and the general-purpose high-speed FIFO interface over USB.

For small runs, each populated board costs about £30.

Some readers of this thread might be interested in this initiative I started:

https://github.com/Guzunty/Pi/wiki

It's not an FPGA, but a CPLD and a lower gate count than yer average FPGA. It has gathered quite a bit of interest nonetheless because of its extremely low price. The cost is kept to a minimum by being a kit (all through hole design).

Started this in an effort to extend the educational capabilities of Rasperry Pi into the hardware domain. It seems to me the world needs more young hardware people at least as as much as it does more budding programmers.

Unless you convinced an FPGA vendor to build their tools for ARM, or used an emulation layer to run the x86 synthesis tools on ARM, you're out of luck. The former is unlikely and the latter would take all day to synthesise even a simple design. You could probably run GHDL and maybe GTKWave on a Raspberry Pi, so you could do simulation work, but not synthesis.

However, there is nothing stopping you synthesising several designs on a PC and then loading the resulting bunch of bitstreams to a Raspberry Pi. The Pi could then load them into the FPGA over USB when needed, using FPGALink. You would not even have to switch SD cards to get a new design. You could even install the Pi+FPGA in a remote location and load new designs into the FPGA over the Internet.

This board I designed recently doesn't fit the usual definition of "shield" (i.e different form-factor, not "pluggable"), but it's cheap, open-source hardware and known to be compatible with the Raspberry Pi:

MakeStuff LX9 PCB
MakeStuff LX9 blinky
MakeStuff LX9 speed test

It has a Xilinx XC6SLX9 FPGA, 16MiB of SDRAM, a 1Mib EEPROM, an SD-card slot and about 50 general-purpose I/Os. You can access the FPGA's JTAG for programming and the general-purpose high-speed FIFO interface over USB.

For small runs, each populated board costs about £30.

Like said, no need to use USB, you can program PROM and FPGA's via JTAG, which the raspberry handles really well, only the bitstream is the problem, which requires a PC/Mac to make, then just ftp to raspberry and run program on it.

Currently working on a JTAG programmer here:
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