l1/l2 cache


7 posts
by tk321 » Fri Jun 29, 2012 9:26 am
This is probably not a raspbian issue, but getconf doesn't see the l1/l2 cache which according to http://www.raspberrypi.org/archives/1040 should be enabled.
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# getconf -a | grep CACHE_SIZE
LEVEL1_ICACHE_SIZE                 0
LEVEL1_DCACHE_SIZE                 0
LEVEL2_CACHE_SIZE                  0
LEVEL3_CACHE_SIZE                  0
LEVEL4_CACHE_SIZE                  0

Also /sys/devices/system/cpu/cpu0/cache/ doesn't exist. Any other way to query the cache, just to convince myself it exists and is enabled?
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by mpthompson » Fri Jun 29, 2012 6:29 pm
tk321 wrote:This is probably not a raspbian issue, but getconf doesn't see the l1/l2 cache which according to http://www.raspberrypi.org/archives/1040 should be enabled.


Interesting. I would believe that the enabling of L1/L2 cache would be a function of the kernel which Raspbian uses the same as the Debian armel releases by the Foundation. Do you know what the results of "getconf -a | grep CACHE_SIZE" on the Debian Wheezy armel beta returns?

Also, plugwash is working on Raspbian specific package of the kernel. He may have more insight into how the L1/L2 cache's are configured his version of the kernel which may differ from the Foundation kernels.
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by dom » Fri Jun 29, 2012 6:35 pm
The L2 is non-standard (being shared with the GPU), so I wouldn't expect that to be detected (except through profiling memory accesses).
The L1 is completely standard ARM cache, so I would expect that to be detected through standard mechanisms.
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by tk321 » Fri Jun 29, 2012 9:28 pm
As for armel I've only tried the official Debian squeeze release and the result is the same there. Can you execute getconf on your arm build system just to see if it's a general linux/arm issue?

Dom, are you saying that the l1/l2 cache is definitely enabled despite the fact the linux kernel/libc doesn't show it? How is the l2 cache split between cpu/gpu and where and how can that be changed?
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by AlArenal » Fri Jun 29, 2012 9:58 pm
The L2 isn't split. Don't think of the BCM as a ARM core with GPU. It's the other way around. The L2 belongs to the GPU and may be made available to the ARM core as well, but the path is rather long and if you do graphics intense stuff you'll shoot yourself in the foot.
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by jerry.tk » Mon Jul 02, 2012 2:42 pm
I tried to run getconf on my armel Kirkwood SoC (L1 Cache: 16K Instruction + 16K Data, L2 Cache: 256KB) NAS with the same result:
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root@iconnect:~# uname -a
Linux iconnect 3.2.5-iconnect #1 Fri Feb 10 12:47:38 CET 2012 armv5tel GNU/Linux
root@iconnect:~# getconf -a|grep CACHE_SIZE
LEVEL1_ICACHE_SIZE                 0
LEVEL1_DCACHE_SIZE                 0
LEVEL2_CACHE_SIZE                  0
LEVEL3_CACHE_SIZE                  0
LEVEL4_CACHE_SIZE                  0

Seems to be general linux/arm issue then.
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by SHINYFATHIMA » Sun Jan 06, 2013 12:55 pm
I am also facing the same issue. I could not find sys/devices/system/cpu/cpu0/cache . the cache folder is missing in my debian linux of my raspberryPI. Any help on this would be appreciated.thanksin advance.
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